Objective

I’m currently working towards my PhD in Electrical Engineering at the University of Calgary with a focus on nano-electronics and VLSI for CMOS image sensor applications. My experience is primarily in the chip design field starting from transistor level design to complete chip-level verification processes. I also have experience in board and system level design using industry standard software.

Experience

May 2019 – Date (Expected Graduation 2024)
PhD. Thesis with Research • University of Calgary I2Sense Laboratory
My research focuses on High-Speed Wide Dynamic Range CMOS sensors
with the ability to capture up to 40MPix per second with more than 100db of dynamic range.
In parallel to graduate research work, I am also involved in lab management,
including safety, licensing, equipment management, and marketing.
Jan 2017 – Dec 2017
Design Lead • Engineering • ATCO Electric
Design lead at ATCO electric. This position involved the price estimation and
design for many small to medium size power distribution projects across
Alberta. I was responsible for deployment and design stages,
communication with the construction and survey teams during the design
execution phase.

Education

University of Calgary, Alberta
BSc. With Honors 2019
PhD. 2019 – Date
(Transferred from MSc. To
PhD May 2020, Expected
Graduation Sept 2024)

Training

EDx Contract Law Course Apr 2020
EDx Introduction to Cloud Computing Aug 2021
Cadence Training Modules – 2020 (Cadence Online Training)
Adobe Creative Cloud Training – 2020 (Linked-in Learning)

Tool Familiarity

• Chip Design (Cadence Virtuoso)
• PCB Layout and Schematic
• (Dip trace, Altium)
• FPGA Programming
• (Xilinx Chips, VHDL & Verilog)
• Embedded System
• Programming (C, C++, Python)
• Web Programming (JavaScript, React, Docker)
• Soldering & Lab Equipment Use (VNAs, Oscilloscopes, Through
• hole & Surface Mount)
• Computer Maintenance, Office

Memberships

IEEE STUDENT MEMBER, MEMBER ID: 93883490
APEGA EIT MEMBER, MEMBER ID: M234841